1. Field of the Invention
The invention generally relates to silicon-on-insulator (SOI) integrated structures and more particularly to an SOI structure that has at least one decoupling capacitor that includes capacitive fingers extending into the non-active bulk region of the SOI structure, where the bulk region is normally only used as a support region and does not normally contain devices.
2. Description of the Related Art
High performance circuits require high-value, low-impedance decoupling capacitors between the DC power supply and ground lines to limit noise created by rapid switching of current. As known, this noise can arise, for example, due to inductive and capacitive parasitics. The noise problem is particularly a concern for mixed-mode products (analog/digital), where it is necessary to work with very low signals.
Ideally, the decoupling capacitors are placed as close as possible to the load in order to enhance their effectiveness in reducing the noise in power and ground lines. Consequently, decoupling capacitors have been fabricated directly on the chip.
However, for SOI or bulk MOS high performance circuits, the resistance of inversion capacitors is excessively high (>5 K-ohm/sq) for decoupling of high frequency noise because of the inversion layer resistance, which is representative of coupling impedance. On the other hand, although accumulation capacitors are effective in bulk MOS, they are not a viable option for SOI because of the high resistance of the thin silicon layer on insulator. Due to other device considerations, such thinner SOI layers are constantly being sought, which aggravates the decoupling capacitor problem. Also, planar junction capacitances are not practical for SOI because of very low SOI to substrate capacitance. None of the silicon based decoupling capacitor approaches commonly practiced for bulk MOS technologies prior to this invention provide a fully acceptable solution for high performance SOI circuits. Other solutions such as metal insulator metal capacitors (MiM cap) are available, but these do not provide high capacitance per unit area, and they use valuable wire tracks in the metal layers which are not desirable.